CWE-1246 — Improper Write Handling in Limited-write Non-Volatile Memories
CWE-1246: Improper Write Handling in Limited-write Non-Volatile Memories
MITRE CWE weakness
| Kind | Weakness |
| Abstraction | Base |
| Status | Incomplete |
| Likelihood of exploit | — |
Description
The product does not implement or incorrectly implements wear leveling operations in limited-write non-volatile memories.
Non-volatile memories such as NAND Flash, EEPROM, etc. have individually erasable segments, each of which can be put through a limited number of program/erase or write cycles. For example, the device can only endure a limited number of writes, after which the device becomes unreliable. In order to wear out the cells in a uniform manner, non-volatile memory and storage products based on the above-mentioned technologies implement a technique called wear leveling. Once a set threshold is reached, wear leveling maps writes of a logical block to a different physical block. This prevents a single physical block from prematurely failing due to a high concentration of writes.
Common consequences
- Availability: DoS: Instability
Mitigations
Architecture and Design — Include secure wear leveling algorithms and ensure they may not be bypassed.
References
- CWE page: https://cwe.mitre.org/data/definitions/1246.html
- CWE list: https://cwe.mitre.org/data/index.html